Nortel-networks Circuit Card Manual do Utilizador descarregar pdf (Página 740)

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Page 740 of 906 NTAK20 Clock Controller daughterboard

553-3001-211 Standard 3.00 August 2005

System clock specification and characteristics

Since the accuracy requirements for CCITT and EIA Stratum 3 are different,

it is necessary to have two TCVCXOs which feature different values of

frequency tuning sensitivity. See Table 238.

EIA/CCITT compliance

The clock controller complies with 1.5 Mb EIA Stratum 3ND, 2.0 Mb CCITT

or 2.56 Mb basic rate. The differences between these requirements mainly

affect PLL pull in range. Stratum 4 conforms to international markets

(2.0 Mb) while Stratum 3 conforms to North American markets (1.5 Mb).

Monitoring references

The primary and secondary synchronization references are continuously

monitored in order to provide autorecovery.

Reference switchover

Switchover occurs in the case of reference degradation or loss of signal.

When performance of the reference degrades to a point where the system

clock is no longer allowed to follow the timing signal, then the reference is

out of specification. If the reference is out of specification and the other

reference is still within specification, an automatic switchover is initiated

Table 238

System clock specification and characteristics

Specifications CCITT EIA

Base Frequency 20.48 MHz 20.48 MHz

Accuracy + 3 ppm + 1 ppm

Operating Temperature 0 to 70 C + 1 ppm 0 to 70 C + 1 ppm

Drift Rate (Aging) + 1 ppm per year + 4 ppm in 20 years

Tuning Range (minimum) + 60 ppm min.

+ 90 ppm max.

+ 10 ppm min.

+ 15 ppm max.

Input Voltage Range 0 to 10 volts, 5V center 0 to 10 volts, 5V center

1 2 ... 735 736 737 738 739 740 741 742 743 744 745 ... 907 908

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